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Question 15 Marks

Explain with the help of a diagram the formation of depletion region and barrier potential in a $p-n$ junction diode.

Answer

Formation of depletion region and barrier potential : A $p-n$ junction is shown in fig. (a). In its p-region positive holes are majority charge carriers along with equal number of fixed negatively charged acceptor ions. In its $n$-region negatively charged electrons are majority charged carriers along with equal number of positively charged ions. Hence both regions seem to be electrically neutral. But as soon as the $p-n$ junction is formed, the majority charge carriers of both the regions due to thermal agitation begin to diffuse at once across the junction from the region of higher concentration to the region of lower concentration.

Therefore the electrons from $n$-region diffuse into $p$-region, where they combine with holes near the junction and get neutralised. Similarly, holes from $p$-region diffuse into $n$-region where they combine with the electrons near the junction and get neutralised. Thus near the junction $p$-region is left with immobile negative ions and $n$-region is left with immobile positive ions [Fig. (b)]. This small region near the $p-n$ junction in which there are no free charge carriers and has only immobile ions is called depletion region. The width of the depletion region is of the order of 10^-6 m.

Now the accumulation of positive charge in $n$-region and that of negative charge in $p$-region sets up a potential difference $V_B$ across the junction. This potential difference acts as a barrier and is called potential barrier which opposes further diffusion of majority charge carriers (electrons and holes) across the junction. This potential barrier sets up an internal electric field $\overrightarrow{ E }_{ B }$ from n-region (+) to p-region (-). Equilibrium is reached when the field $\overrightarrow{ E }_{ B }$ becomes strong enough to stop further diffusion of the majority charge carriers. Although this field $\overrightarrow{ E }_{ B }$ helps the minority charge carriers i.e., holes in n-region and electrons in p-region to diffuse across the junction.
The potential barrier V_B depends upon (i) the nature of the semi-conductor, (ii) temperature and (iii) amount of doping. It's value for Silicon is 0.7 volt and for Germanium it is 0.3 volt.

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Question 25 Marks

Explain oscillating action of a n-p-n transistor with circuit diagram.

Answer

An oscillator is an electronic device which produces electric oscillation of constant frequency and amplitude requiring any external input signal.
It converts dc energy obtained from a battery into a.c. energy in same oscillatory circuit. Obviously an oscillator may be regarded as the self sustained transistor amplifier with positive feedback.
Construction
(i) Tank Circuit : A tank circuit is just a parallel combination of an inductance L and a capacitance C. The electric energy once given to it alternately changes between electrostatic energy in the capacitor and the magnetic energy in the inductor. The frequency of electric oscillations in the tank circuit is :
$f=\frac{1}{2 \pi \sqrt{ LC }}$
However, the oscillations get damped due to resistive losses in the inductance and dielectric losses in the capacitor.
(ii) Transistor Amplifier : The oscillations of the tank circuit are fed to the transistor amplifier. The oscillations get amplified due to the amplifying action of the transistor.
(iii) Feedback Circuit : To compensate for the energy losses occurring in the tank circuit, the feedback circuit returns (feedback) a part of the output power of the transistor amplifier to the tank circuit in phase with the input signal. This process is called positive feedback and produces undamped oscillations. The feedback may be done through inductive coupling (mutual inductance).
Figure shows the basic circuit using a common-emitter $n-p-n$ transistor as an oscillator. A tank circuit con-sisting of an inductance L and a variable capacitor C is connected in the input or the emitter-base circuit which is forward biased. A small coil L' called feedback or tickler coil is connected in the output or the emitter-collector circuit which is reverse biased. The coil L' is induc-tively coupled with the coil L of the tank circuit.

Working of Oscillator with Feedback Action : When the switch S is closed, a small collector current starts growing through coil L'. This increases the magnetic flux linked with coil L' and hence with coil L. This induces e.m.f. in coil L in the direction of forward bias and a positive charge begins to build on the upper plate of capacitor C. The emitter current increases and also the collector current increases. This increases the magnetic flux linked with L' and hence with L. Consequently, the forward bias increases which further increases the emitter and collector currents. Charging of capacitor continues. This process continues till the collector current becomes maximum.
When the current through L' stops changing, the induced emflinked with L vanishes. This decreases the emitter current and hence the collector current. The decreasing current through L' induces emf in L in the opposite direction of the forward bias. This results in decrease in the emitter current and hence the collector current. At the same time positive charge on the lower plate of capacitor C begins to build up. The process continues till the collector current becomes zero. (In fact, inertia of the collapsing magnetic field carries the collector current below the zero value). The induced emf linked with L again becomes zero, i.e., the forward bias is now not being opposed by induced emf. The emitter current and hence the collector current will start increasing. This cycle repeats again and again to give electric oscillations of constant amplitude and of constant frequency.
$f=\frac{1}{2 \pi \sqrt{ LC }}$
The oscillations of a desired frequency can be obtained by changing the value of capacitance C of the variable capacitor. In this oscillator, we have connected tank circuit on the base side. Hence, it is known as tuned base oscillator. If the tank circuit is on the collector side, it will be known as tuned-collector oscillator.
In common-emitter transistor circuit, a signal applied to the base-emitter circuit appears with a phase change of 180° in the collector-emitter circuit. The coupling of L and L' produces a further phase change of 180° due to mutual induction. Hence the energy feedback to the tank circuit is in phase with the input signal. Due to this positive feedback, the oscillations of the tank circuit are correctly maintained.

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Question 35 Marks

What happens when a forward bias is applied to a $p-n$ junction?

Answer

Forward Biasing: When the positive terminal of an external battery is connected to the $p$-region and negative terminal of the battery to the $n$-region of a $p-n$ junction then the junction is said to be forward-biased and this process is known as forward biasing of the junction. Hence in this biasing an external field E is set up on the junction which is directed from $p$-region to $n$-region of the junction. It is obvious that this field is in the direction opposite to the direction barrier field $\vec{E}_{B}$.

The electric field E is much stronger than the opposing field $E_{B}$. Therefore, the force on the positive hole will act in the direction of field E and the force on the negatively charged electron will act in the direction opposite to that of $\vec{E}$. Therefore, positive holes of $p$-region and electrons of $n$-region both move towards the $p-n$ junction. These holes and electrons combine with each other near the junction and their existence is gone. Now for each electron-hole combination a covalent band breaks up in $p$-region near the positive terminal of the battery. Now out of the newly produced hole and electron, the hole moves towards the junction while the electron enters the positive terminal of the battery through the connecting wire used. At the same instant an electron is detached from the negative terminal of the battery and enters the $n$-region to compensate the electron loss in the combination with hole at the junction. In this way the flow of majority charge carriers i.e., holes in $p$-region and electron in n-region constitutes an electric current across the $p-n$ junction. The electric current flowing through the junction in forward biasing is called forward current. The electric current in the external circuit is due to the flow of electrons as shown is Fig. (a).
In addition to the large forward current, a small current due to the motion of minority carriers i.e., electrons in $p$-region and holes in n-region flows in the direction opposite to the forward current. This current is called reversed current, but it is almost negligible.
In forward biasing of a $p-n$ junction applied external electric field E dominates the small barrier field $E_{B}$, hence majority charge carriers i.e., holes in $p$-region and electron in n-region are pulled towards the junction. Therefore, in this biasing, the width of the depletion layer decreases due to which $p-n$ junction offers a low resistance for the forward biased current.
Voltage-Current Characteristic Curve : For forward biasing of a $p-n$ junction the graph drawn between applied voltage known as forward bias voltage V and the corresponding forward biased current is shown in Fig. (b). This is voltage-current characteristic curve of $p-n$ junction in forward biasing. It has been drawn for Germanium $p-n$ junction.

It is obvious from the curve that in the beginning when the applied voltage is low (of the order of barrier voltage ≈ 0.3 V) the current through the junction is almost zero because both these voltages oppose each other. As the applied voltages is increased the current increases very slowly and nonlinearly until the applied voltage becomes greater than barrier voltage or say potential barrier. This behaviour of the junction is shown by the graph portion OA. With further increase in applied voltage forward biased current increases very rapidly and linearly. In this position the junction behaves as a conductor. This behaviour of junction is shown by straight line part AB of characteristic curve. When this straight line is drawn back, it intersects the voltage-axis at barrier voltage.

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Question 45 Marks

What is Zener diode? Give its symbolic diagram. Draw its (I-V) characteristic curve. Explain its use as a voltage regulator ?

Answer

Zener diode: A properly dopped (heavy doped) $p-n$ junction diode which works in the breakdown region without damaging itself is called a Zener diode. Its symbolic diagram is represented by

V-I Characteristic of Zener Diode : The circuit diagram for obtaining voltage-current characteristic of a Zener diode is the same as for ordinary $p-n$ junction diode. It's V-I characteristics is shown in Fig. (b). Under increasing forward bias the zener diode acts like an ordinary $p-n$ junction diode. But under increasing reverse bias a small saturated current $\left( I _{ z }\right)$ flows across the junction and remains constant upto a critical value of reverse voltage V₂ upto the point K known as knee point, beyond which reverse current increases abruptly and now it is known as Zener current I_z.

Here $I _0$ is the minimum value of reverse current which must be maintained to keep the diode in the breakdown region. $I_{z \max }$ is the maximum value of the zener current above which the diode may be damaged.
The value of this current is given by maximum power rating (provided by the manufacturer), and can be controlled by suitable external load. As long as this limit is not crossed, the diode is not damaged and comes out of the breakdown region on reducing the voltage below $V _z$.
Zener Diode as a Voltage Regulator :
Working Principle : When a Zener diode is operated under reverse biased position in the breakdown region the voltage across it remains practically constant, equal to the breakdown voltage V_z for a large change in the reverse current. This is the fact on which, Zener diode's working principle as a voltage regulator is based. The voltage regulator is also known as voltage stabilizer.

Circuit diagram and its action : The circuit diagram for using Zener diode as a voltage regulator is shown in Fig. (c). In this circuit diagram a zener diode is connected in reversed bias position to a source of unregulated D.C. voltage e.g., fluctuating voltage output of a rectifier through a series resistance R. A load resistance R_Lthrough which regulated voltage is to be received is connected in parallel to zener diode. Here the zener diode is selected with a zener voltage V_Z equal to the stabilized voltage desired across R_L.
If during the fluctuations in the input voltage at some instant there is a rise in it, the current through resistance R and zener diode also increases. Due to this there is a rise in voltage drop across R but no change in the voltage across the zener diode because in the breakdown region zener voltage V_Z remains constant even though the current through it changes. In the same way if the input voltage decreases, the voltage across the resistance R decreases without any change in the voltage across the zener diode. Thus any change (rise or fall) in input voltage results in the corresponding similar change in voltage drop across R without any change in voltage across zener diode. Hence the output voltage across load resistance R_L equal to V_Z remains constant. Thus, the zener diode acts as a voltage regulator or say voltage stabilizer. It should be noted that since the resistance R removes the fluctuations to give a regulated i.e., constant output voltage V_Z, the circuit cannot work if the input voltage falls below V_Z.

If a graph between output voltage (V_o) and input voltage (V_i) for a zener diode is drawn, it is obtained as shown in Fig. (d). It is obvious from this graph that the output voltage remains constant beyond the reverse breakdown voltage V_Z.

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Question 55 Marks

Describe $p-n-p$ transistor as an amplifier in common emitter configuration with proper circuit diagram.

Answer

Common Emitter $p-n-p$ Transistor Amplifier : Circuit Diagram : For this amplifier the circuit diagram is shown in Fig. (a) in which emitter is made common to input and output circuits.
Action : Here the input circuit is forward biased by a low voltage battery $V _{ BE }$ and the output circuit is reversed biased by a high voltage battery V_cc. Thus, the resistance of the input (≈ 1 ΚΩ) is low and that of output is high (= 50 ΚΩ).

A load resistance R_L is connected in collector-emitter circuit i.e., output circuit. The weak input a.c signal is applied in the base-emitter circuit and the amplified output a.c. signal is obtained across R_L in the collector emitter circuit i.e., output circuit.
When there is no a.c. input voltage signal in the circuit then according to Kirchhoff's current law, the relation between emitter current I_E base current I_B and collector current I_C will be :
$I_E=I_B+I_C$ ...(1)
where I_C is sightly less than I_E due to a bit small value of I_B.
Now due to collector current I_C the potential drop across the load resistance R_Lwill be, I_C R_L Therefore, the potential difference between collector and emitter i.e., collector-emitter voltage V_CE would be given by
$V_{C E}=V_{C C}-I_C \cdot R_L$ ...(2)
But when the a.c. input voltage signal (which is to be amplified) is applied in the input circuit, it changes the base-emitter voltage V_BE due to which emitter current I_Eand correspondingly the collector current I_C will be changed. The change in the base current I_B being very small.
Thus, due to change in I_C according to equation (2), the voltage V_CE varies. This variation in V_CE due to input a.c. signal appears as an amplified output across the load resistance R_L.
Phase Relationship between Input and Output Voltage Signals : In first positive half-cycle of a.c. input it opposes the forward biasing of input circuit resulting in reduction in forward biasing of this base-emitter circuit. Due to this the emitter current $I _{ E }$ decreases and correspondingly there is a decrease in collector current $I _{ C }$ also. Hence according to the equation $V_{C E}=V_{C C}-I_C R_L$, the decrease in $I _{ C }$ results in an increase in voltage V_CE . Since collector is connected to the negative terminal of the biasing battery V_CC hence an increase in voltage $V _{ CE }$ means that it becomes more negative.
This in first positive half-cycle amplified amplitude of the output signal in negative direction is obtained.
In the next negative half-cycle of the input signal it supports the forward biasing of the base-emitter circuit. Therefore, the emitter current I_E and correspondingly the collector current I_C both increases. As a result on the bases of equation $V_{C E}=V_{C C}-I_C \cdot R_L$, the voltage V_CE decreases, hence the collector becomes less negative. In this way in the next negative half-cycle amplified amplitude of the output signal in the positive direction is obtained.Hence it may be conclude that in common-emitter transistor amplifier the output voltage signal is in opposite phase to that of input signal i.e., output voltage signal is 180° out of phase with the input voltage signal.
Constants of Common Emitter Transistor Amplifier: The various constants i.e., gains of a common emitter transistor amplifier are defined as follows which are similar for both types i.e., $p-n-p$ and $n-p-n$ transistor amplifiers.
(i) A.C. Current Gain i.e., Current Amplification Factor : "It is defined as the ratio of the change in the collector current to the change in the base current when collector-emitter voltage is kept constant." It is denoted by $\beta_{a c}$
$\therefore \quad \beta_{a c}=\left(\frac{\Delta I _{ C }}{\Delta I _{ B }}\right)_{ V _{ C E } \text { constant }}$ ...(1)
The value of $\beta$ is from 15 to 50 .
(ii) A.C. Voltage Gain i.e., Voltage Amplification Factor : "It is defined as the ratio of the change in the output voltage to the change in the input voltage." It is denoted by A_V.
$\therefore \quad A _{ V }=\left(\frac{ V _o}{V_i}\right)$ ...(2)
But $V _o=\Delta I _{ C } \times R _o$ and $V _i=\Delta I _{ B } \times R _i$
Where $R _o=$ Output resistance
And $R _i=$ Input resistance
$\Delta I _{ C }=$ Change in collector current
and $\Delta I _{ B }=$ Change in base current
$\therefore \quad A _{ V }=\frac{\Delta I _{ C } \times R _o}{\Delta I _{ B } \times R _i}=\left(\frac{\Delta I _{ C }}{\Delta I _{ B }}\right)\left(\frac{ R _o}{ R _i}\right)$
But $\frac{\Delta I _{ C }}{\Delta I _{ B }}=$ Current gain $\beta_{\text {a.c. }}$ and $\frac{ R _o}{ R _i}=$ Resistance gain
$\therefore \quad A_V=\beta_{a c} \times \text { resistance gain }$ ... (3)
Since $\beta_{ ac } \gg \alpha_{ ac }$ hence $A _{ V }$ for C.E amplifier is larger than that for CB amplifier.
(iii) A.C. Power Gain or Power Amplification Factor : "It is defined as the ratio of the change in output power to the change in input power. "It is denoted by P_ac.
∵ Power, $P = I \times V$
$P _{ ac }=$ a.c. current gain × a.c. voltage gain
$P_{a c}=\beta_{a c} \times A_V$
$=\beta_{ ac } \times\left(\beta_{ ac } \times\right.$ resistance gain $)$
$\Rightarrow \quad P _{ ac }=\beta_{ ac }^2 \times$ resistance gain ...(4)

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Question 65 Marks

How is $p-n$ junction diode is used as an half wave rectifier? Explain its action with proper circuit diagram. Show the input and output waveform also.

Answer

$p-n$ junction diode as a Half Wave Rectifier : "A device that converts an alternating current or voltage into direct i.e., unidirectional current or voltage is called rectifier." The rectifier which converts only half cycle of alternating current into direct current is called half wave rectifier.
A $p-n$ junction diode has asymmetric conducting property i.e., it is highly conducting when forward biased and non-conducting when reverse biased. In this way a $p-n$ junction diode allows the electric current to pass through it only in one direction, hence it on be used as a rectifier.
The circuit for a $p-n$ junction diode used as a half wave rectifier is shown in the figure (a).

Working : A.C. from the main supply is fed to the primary P of suitable step-down transformer. The desired low voltage A.C. is obtained across the terminals S₁ and S₂of secondary S. The load resistance R₁. through which direct current (d.c.) is required is connected to terminals S₁ and S₂ through $p-n$ junction diode D.

The potential of terminal S₁ with respect to S₂ varies as sine function of the time as shown in figure (b). It is input waveform. It is obvious that the polarity of S₁ and S₂ alternately becomes positive and negative with time.
During the first half-cycle of the a.c. input, when the terminal S₁ of the secondary is supposed to be positive and S₂ is negative, the junction diode is forward biased. Hence it conducts and current flows through the load R_L in the direction shown by arrows. The current produces across the load an output voltage of the same type as the half-cycle of the input voltage. During the second half-cycle of the a.c. input, the terminal S₁ is negative and S₂ is positive. The diode is now reverse-biased. Hence there is almost zero current and zero output voltage across R_L. The process is repeated during the next cycles.
In this way the output current is a continuous series of unidirection pulses [Fig. (c)]. It is output waveform. Thus the output current is D.C. current (i.e., flowing in one direction) which is not steady but fluctuating between 0 and maximum value I_m.
Since the output current corresponds to one half of the input voltage wave, the other half being missing, the process is called half-wave rectification and the $p-n$ junction diode is called half-wave rectifier.

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Question 75 Marks

Explain the Function of a $n-p-n$ transistor as a switch with necessary circuit diagram.

Answer

Any device which can turn ON and OFF current in an electrical circuits in known as a switch. Generally, mechanical switches are used to resume and break connection in electrical circuits. Digital devices like computers perform a very large number of switching operations every day. In computer circuits an electronic device like junction diode and junction transistor can be used to turn rapidly on or off the current.
Junction Transistor as a Switch : In order to understood the switching action of a junction transistor we should be familiar with three states of working of a transistor. In Fig. (a), circuit diagram of an $n-p-n$ transistor in common-emitter configuration is shown. In this circuit a battery of variable voltage V_BB IS connected to input circuit i.e., base-emitter circuit and another battery of variable voltage Vcc is connected to the output circuit i.e., emitter-collector circuit, R_B and R_e are the resistances in the input and output circuits, respectively.

Now applying Kirchhoff's voltage rule in the closed loop of input side and output side, we get respectively as :
$V_{BB}=I_{B} R_{B}+V_{BE} \text { and } V_{CE}=V_{CC}-I_{C} R_{C}$ ... (1)
But the voltage $V_{B B}$ can be regarded as d.c. input voltage V_i and V_CE as the d.c. output voltage V_O Hence the above equation can be written as :
$V _i= I _{ B } R _{ B }+ V _{ BE }$ and $V _o= V _{ CC }- I _{ C } R _{ C }$ ...(2)
With the help of series (2) of the equation, a graph between $V _o$ and $V _i$ is drawn, which is called transfer characteristic of the junction transistor Fig. (b). This typical characteristic curve has three well defined regions as follows :
(i) Cut-off region : In Si transistor, as long as input V_i is less than 0.6 V the transistor remains in cut off state and current I_cremains zero.
$\therefore \quad V _o= V _{ CC }$
This region is called cut-off region.
(ii) Active region : When V_ibecomes greater then 0.6 V tansistor is in active region with some current I_c in the output path and the output V_o decreases as the current $I _{ C }$ increases ( $V _o= V _{ CC }- I _{ C } R _{ C }$ ). With increase in $V _i, I _{ C }$ increases almost linearly and so $V _o$ decreases linearly till its value becomes less than about 1.0 V .

(iii) Saturation Region : When V_iis further increased to a high value, the large collector current flows which produces such a large potential drop across the load R_c that the emitter-collector junction gets also forward biased. The output voltage V_o decreases to almost zero. Since it cannot pass any more collector currect I_C, hence this situation is called saturation state and the transistor is said to be in saturation region.
A transistor can be used as a switch only if it is operated in its cut-off and saturation states. The electric circuit required to explain the switching action of a junction transistor is shown in Fig. (c) (i) in which common emitter $n-p-n$ transistor is used.

When the base input voltage V_in is negative or zero as shown in Fig. (c) (ii), the transistor is cut-off (i.e., base current I_B is zero) and no collector current flows in the load resistance R_L connected to the collector circuit. As such, there is no voltage drop across R_L. Hence the output voltage is equal to the collector supply voltage,
i.e. $V _{\text {out }}= V _{ CC }$
Strictly speaking, the collector current is not zero since a small collector-to-emitter leakage current always flows when the base input voltage is negative or zero.
When the base input voltage is positive [Fig. (c) (ii)], a base current I_B flows and an amplified collector-current I_c flows through the load R_L. Clearly, the output voltage is now given as follows :
$V _{\text {out }}= V _{ CC }- I _{ C } R _{ L }$
Thus, the transistor turns the current ON or OFF in the load R_L depending upon whether the input base voltage is positive or negative (or zero). In other words, it acts like a switch.
An compared to other types of switches, the transistor switch is compact, noiseless, trouble-free and has a very fast speed of operation.

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Question 85 Marks

What are intrinsic semiconductor and extrinsic semiconductor ? Explain.

Answer

Intrinsic Semiconductor: A pure semiconductor which is free from any impurity is called intrinsic semiconductor. Pure germanium and pure silicon in their natural state are the examples of intrinsic semiconductors. The electronic configuration of these elements is as given below :
Germanium (Ge) : $Z=32$; $1s^{2}, 2s^{2}2p^{6}, 3s^{2}3p^{6} 3d^{10}, 4s^{2}4p^{2}$.
Silicon (Si) : $Z=14$; $1s^{2}, 2s^{2}2p^{6}, 3s^{2}3p^{2}$.
Now it is obvious from this configuration that there are four electrons in outermost orbit of each of these atoms i.e., Ge and Si both have four valence electrons i.e., both are tetravalent.
The outermost shell of an atom is of interest in electronics because it contains the loosely bound valence electrons which are easily dislodged to become electric charge carriers. Since germanium has four valence electrons, hence for our purpose the germanium atom may be pictured as containing only these electrons and four protons in the nucleus to keep it electrically neutral. When germanium is in its crystalline form its atoms are arranged in an ordered array in which each atom is situated at a corner of a regular tetrahedron [Fig. (a)].

In this figure, each of the four valence electrons of the atom is shared with the nearest neighbouring electron and forms a covalent bond, shown by shaded curved lines in the figure. In this way in this structure four valency electron pairs are associated with each nucleus.
At temperatures near to absolute zero all valency electrons are bound so strongly with each other and with the nucleus that no free electrons are available to conduct an electric current through the crystal. Thus, at such temperature pure germanium crystal i.e., intrinsic semiconductor seems to be a non-conductor of electricity.
At room temperature due to thermal agitation in the crystal a few covalent bonds are broken liberating some free electrons as charge carriers. An electron disloged from a covalent bond leaves behind a vacancy in the covalent band which is named as hole. Since a hole represents the deficiency of an electron in the band, hence it behaves as a positive charge which is equal in magnitude to be charge of an electron.

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Question 95 Marks

How are fundamental logic gates OR, AND and NOT obtained from NOR gates ?

Answer

(1) To get OR Gate from NOR Gate : When output of a NOR gate is made input of a NOT gate obtained with the help of another NOR gate then OR gate is obtained. [Fig. (a)]

Boolean Expression :
$Y =\overline{\overline{ A \cdot B }}=\overline{\overline{ A } \cdot \overline{ B }}= A + B$
This can be explained with the help of truth table as follows :

(2) To obtain AND gate from NOR gate : By using three NOR gates interconnected in the following manner as shown in figure (b), an AND gate can be obtained.

Thus : $Y =\overline{\overline{ A } \cdot \overline{ B }} \Rightarrow Y = A \cdot B$
This can be explained with the help of truth table as follows :

(3) To obtain NOT gate from NOR gate : By joining both the input terminals of a NOR gate, one input NOR gate is obtained which behaves as a NOT gate [Fig. (c)]. In NOR gate output is high when both the inputs are low and output is low when either or both the inputs are high.

Here $Y =\overline{ A + B }$ or $Y =\overline{ A }($ i.e. $A = B )$
This can be explained with the help of truth table as follows :

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5 Marks Questions - Physics STD 12 Science Questions - Vidyadip

Physics 5 Marks Questions

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